Digital Circuit And Logic Design Question Paper of 3rd Semester ECE16 Download Previous Years Question Paper 3

Roll No.

Total No. of Questions : 09

B.Tech. (ECE/ETE) (Sem.–3)

DIGITAL CIRCUIT AND LOGIC DESIGN

Subject Code : BTEC-302 (2011 Batch)

Paper ID : [A1131]

Time : 3 Hrs.

INSTRUCTION TO CANDIDATES :

1. SECTION-A is COMPULSORY consisting of TEN questions carrying

TWO marks each.

2. SECTION-B contains FIVE questions carrying FIVE marks each and

students has to attempt any FOUR questions.

3. SECTION-C contains THREE questions carrying TEN marks each and

students has to attempt any TWO questions.

SECTION-A

l. Answer briefly :

a) Convert (10110110)2 to Gray code and Excess 3 code.

b) Prove that if A+B = A+C and AB=AC then B=C.

c) Give the implementation circuit of 3 to 8 line decoder.

d) Compare sequential circuits and combinational circuits.

e) Convert the following logic function into product of midterms :

F(A,B,C,D) = C’D+ABC’+A’B’D+ABD’

f) How many bits are required for a DAC so that its full scale output is

12.6 V and resolution is 20 mV?

g) Implement the following function using PAL: Y=  m(2,4).

h) List different applications of counters.

i) Explain resolution of A/D converters.

j) Give the classification of Bipolar and Unipolar logic families.

SECTION-B

2. Simplify using K maps :

I) Y= ∑ m(l,3,5,6) + ∑ d(4)

II) Y= ∑M (1,3,7,11,15 ). d(5,9,13)

3. Design a 3 bit odd parity generator.

4. Convert JK Flip flop to SR flip flop.

5. What are three basic types of TTL? Explain any two in detail.

6. Explain briefly working of binary weighted resistance D/A converter with the help of an example. What are its drawbacks?

SECTION-C

7. Write short notes on :

I) PLD’s

II) ROM.

8. a) Design a 3 bit synchronous up/down counter using JK flip flops.

b) Explain two applications of registers as counters.

9. Enlist different applications of Multiplexer. Implement the logic function:

Y(A,B,C,D)=  m(0,l,3,5,7) using

I) Single 8:1 MUX

II) Single 4:1 MUX

III) Single 2:1 MUX